Publications by Jae-Hee Won

International Conferences

  1. Jae-Hee Won and Kiyoung Choi, “Low power self-timed floating-point divider in 0.25um technology,” European Solid-State Circuits Conference, Sep. 2000.
  2. Jae-Hee Won and Kiyoung Choi, “Low power self-timed radix-2 division,” International Symposium on Low Power Electronics and Design, pp. 210-212, Jul. 2000.
  3. Jae-Hee Won and Kiyoung Choi, “Self-timed statistical carry lookahead adder using multiple-output DCVSL,” International Conference on VLSI and CAD, pp. 560-563, Oct. 1999.
  4. Jae-Hee Won and Kiyoung Choi, “Modified half rail differential logic for reduced internal logic swing,” IEEE International Symposium on Circuits and Systems, pp. 157-160, May 1998.
  5. Yongjoo Kim, Youngsoo Shin, Kyuseok Kim, Jae-Hee Won, and Kiyoung Choi, “Efficient prototyping system based on incremental design and module-by-module verification,” IEEE International Symposium on Circuits and Systems, pp. 924-927, May 1995.

Domestic Conferences

  1. 김용주, 신영수, 김규석, 원재희, 최기영, “An efficient computer-aided prototyping system based on FPGAs”, 추계종합학술대회 논문집, pp. 1382-1385, 1994.